Effective implementation methods of FIR filters in FPGAbased signal processing systems

dc.contributor.authorKorud, Andriy
dc.contributor.authorKorud, Vasyl
dc.date.accessioned2014-07-23T12:23:27Z
dc.date.available2014-07-23T12:23:27Z
dc.date.issued2013
dc.description.abstractToday’s modern FPGA devices and high speed digital to analog converters make it possible to use advanced direct synthesis technologies in semi-professional equipment. However this market segment is usually cost-sensitive, that’s why effective usage of available hardware resources is important. This paper analyzes implementation techniques of one of the most resourceconsuming building blocks – FIR filters, special attentions is paid to multiplierless approach. Proposed ways of improving existing methods using hardware resources available in the latest-generation FPGAs.en
dc.format1 s.cs
dc.format.mimetypeapplication/pdf
dc.identifier.citationCPEE – AMTEE 2013: Joint conference Computational Problems of Electrical Engineering and Advanced Methods of the Theory of Electrical Engineering: 4th – 6th September 2013 Roztoky u Křivoklátu, Czech Republic, p. II-3.en
dc.identifier.isbn978-80-261-0247-2
dc.identifier.urihttp://hdl.handle.net/11025/11569
dc.language.isoenen
dc.publisherUniversity of West Bohemiaen
dc.relation.ispartofseriesCPEE – AMTEE 2013: Joint conference Computational Problems of Electrical Engineering and Advanced Methods of the Theory of Electrical Engineeringen
dc.rights© University of West Bohemiaen
dc.rights.accessopenAccessen
dc.subjectprogramovatelná hradlová polecs
dc.subjectFIR filtrycs
dc.subject.translatedfield programmable gate arrayen
dc.subject.translatedFIR filtersen
dc.titleEffective implementation methods of FIR filters in FPGAbased signal processing systemsen
dc.typekonferenční příspěvekcs
dc.typeconferenceObjecten
dc.type.statusPeer-revieweden
dc.type.versionpublishedVersionen

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