Efficient acceleration structure layout for 64-bit many-core architectures

Abstract

A lot of rendering solutions use an acceleration structure to reduce the complexity of solving geometric proximity search problems. Although acceleration structures are well studied, data exceeding 32 bit address space require an acceleration structure with special properties, such as compact memory layout, efficient traversal capability, memory address space independence, parallel construction capability and 32/64 bit efficiency. We propose a specific memory layout for a kd-tree and methods of processing that data structure handling massive models with the highest efficiency possible. The components of that are easily applied to other hierarchical acceleration structure types as well.