Design of current-controlled current conveyor stage with systematic current offset reduction
dc.contributor.author | Šotner, Roman | |
dc.contributor.author | Prokop, Roman | |
dc.contributor.author | Jeřábek, Jan | |
dc.contributor.author | Kledrowetz, Vilém | |
dc.contributor.author | Fujcik, Lukáš | |
dc.contributor.author | Dostál, Tomáš | |
dc.date.accessioned | 2019-09-25T06:10:15Z | |
dc.date.available | 2019-09-25T06:10:15Z | |
dc.date.issued | 2015 | |
dc.description.abstract-translated | This contribution presents modification of current-controlled current conveyor (CCCII) designed in order to reduce the systematic DC current offset of transfer between X and Z terminal and also an example of practical design including practical guideline and recommendations. Simulations in Cadence Spectre simulator with ON Semiconductor/AMIS I2T100 based on 0.7 μm technology CMOS07 were provided for verification of discussed features. | en |
dc.format | 4 s. | cs |
dc.format.mimetype | application/pdf | |
dc.identifier.citation | 2015 International Conference on Applied Electronics: Pilsen, 8th – 9th September 2015, Czech Republic, p.225-228. | en |
dc.identifier.isbn | 978-80-261-0385-1 (Print) | |
dc.identifier.isbn | 978-80-261-0386-8 (Online) | |
dc.identifier.issn | 1803-7232 (Print) | |
dc.identifier.issn | 1805-9597 (Online) | |
dc.identifier.uri | http://hdl.handle.net/11025/35127 | |
dc.language.iso | en | en |
dc.publisher | Západočeská univerzita v Plzni | cs |
dc.rights | © University of West Bohemia | en |
dc.rights.access | openAccess | en |
dc.subject | tranzistory | cs |
dc.subject | systematika | cs |
dc.subject | zrcadla | cs |
dc.subject | standardy | cs |
dc.subject | integrované obvody CMOS | cs |
dc.subject | prsty | cs |
dc.subject | zpracování signálu | cs |
dc.subject.translated | transistors | en |
dc.subject.translated | systematics | en |
dc.subject.translated | mirrors | en |
dc.subject.translated | standards | en |
dc.subject.translated | CMOS integrated circuits | en |
dc.subject.translated | fingers | en |
dc.subject.translated | signal processing | en |
dc.title | Design of current-controlled current conveyor stage with systematic current offset reduction | en |
dc.type | konferenční příspěvek | cs |
dc.type | conferenceObject | en |
dc.type.status | Peer-reviewed | en |
dc.type.version | publishedVersion | en |
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