Mathematical analysis of random telegraph noise in low-power applications of MOSFETs

Abstract

Silicon MOSFETs are active switching elements which form the basis for most currently available digital circuits. Especially in information technology the growth in circuit complexity and data throughput leads to an increase in power consumption. For this reason, the energy efficiency of transistors has become a major design issue. A common way to increase the energy efficiency of these devices is to reduce the signal level, which finally leads to the so-called sub-threshold operation. An advantage of this approach is that it can be applied to common structures so that new device concepts are not necessarily required. However, the reduction in the signal level leads unavoidably to a degradation of the signal to noise ratio. Especially random telegraph noise has a significant influence on the circuit behavior. In this work this type of noise is studied mathematically. A stochastic simulation model was developed and a method was provided by which it can be determined how low the supply voltage can be chosen in order to keep the noise influence sufficiently low.