Figure of Merit of Semiconductor Structures Determination of the impact on the system efficiency of LLC converter

dc.contributor.authorKozáček, Boris
dc.contributor.authorFrivaldský, Michal
dc.contributor.authorKošťál, Juraj
dc.contributor.authorPiri, Marek
dc.date.accessioned2019-09-24T08:32:22Z
dc.date.available2019-09-24T08:32:22Z
dc.date.issued2015
dc.description.abstract-translatedThis article has been realized in order to show simplified design procedure on how to meet the standards for dc-dc converters, which are being constantly increased. Hence we decided to analyze several generations of power semiconductor MOSFET and diode structures. With the use of simulation we've analyzed power losses (switching losses and conduction losses) during Zero Voltage Switching commutation mode. Parametric simulations were carried out at the conditions that meet electrical parameters of switched mode power supplies suited for distributed power systems. The aim of determination of switching losses at different conditions during ZVS mode is to see, whether determination of figure of merit (FOM) parameter can be considered as reliable indicator for proper device selection for target application. Consequently the FOM parameter for selected types of transistors and diodes in terms of several FOM methodologies has been determined. This parameter shall represent a measure of semiconductor suitability for high frequency power transistor application. The relevancy of FOM parameter will be finally evaluated in the way of efficiency (one of qualitative indicator) investigation of proposed LLC converter. Based on the evaluation of simulation analysis and on efficiency investigation of proposed LLC converter the confirmation of FOM relevancy will be confirmed.en
dc.format6 s.cs
dc.format.mimetypeapplication/pdf
dc.identifier.citation2015 International Conference on Applied Electronics: Pilsen, 8th – 9th September 2015, Czech Republic, p.115-120.en
dc.identifier.isbn978-80-261-0385-1 (Print)
dc.identifier.isbn978-80-261-0386-8 (Online)
dc.identifier.issn1803-7232 (Print)
dc.identifier.issn1805-9597 (Online)
dc.identifier.urihttp://hdl.handle.net/11025/35104
dc.language.isoenen
dc.publisherZápadočeská univerzita v Plznics
dc.rights© University of West Bohemiaen
dc.rights.accessopenAccessen
dc.subjectpolovodičové diodycs
dc.subjectspínání nulového napětícs
dc.subjectanalytické modelycs
dc.subjectztráta z přepínánícs
dc.subjectMOSFETcs
dc.subject.translatedsemiconductor diodesen
dc.subject.translatedzero voltage switchingen
dc.subject.translatedanalytical modelsen
dc.subject.translatedswitching lossen
dc.subject.translatedMOSFETen
dc.titleFigure of Merit of Semiconductor Structures Determination of the impact on the system efficiency of LLC converteren
dc.typekonferenční příspěvekcs
dc.typeconferenceObjecten
dc.type.statusPeer-revieweden
dc.type.versionpublishedVersionen

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