Hardware Pipeline for Rendering Clouds of Circular Points

Date issued

2005

Journal Title

Journal ISSN

Volume Title

Publisher

UNION Agency

Abstract

This paper presents an algorithm for image rendering using FPGA (Field-Programmable Gate Arrays). The image is rendered by an FPGA chip coupled with a DSP (Digital Signal Processor) on an experimental board. The graphical data is 3D point-clouds – sets of particles that are from the geometrical point of view oriented ellipses in 3D space. Such scene representation seems to be more suitable for potentially many purposes than the most commonly used triangle meshes. The actual experimental implementation which verifies the concept and shows promising results is described.

Description

Subject(s)

bodové mraky, vykreslování, hardwarová akcelerace, digitální signální procesor, programovatelné hradlové pole

Citation

WSCG '2005: Full Papers: The 13-th International Conference in Central Europe on Computer Graphics, Visualization and Computer Vision 2005 in co-operation with EUROGRAPHICS: University of West Bohemia, Plzen, Czech Republic, p. 17-22.
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