Timepix4: Power Supply Topology Optimization

Abstract

This paper describes the design of a power management system for the Timepix4 readout chip. The Timepix4, the latest generation of the Timepix family developed within the MEDIPIX collaboration at CERN, is a powerful readout chip for particle pixel detectors. It offers enhanced resolution with a matrix of 512×448 pixels and excellent timing performance with 195 ps time binning. However, this high performance comes with strict requirements for power supply stability and low-noise operation. The authors discuss these requirements in detail and propose several candidate solutions for optimal powering of the chip. Two of these solutions were practically implemented and tested. The evaluation is based on measurements of electrical parameters as well as the impact of the proposed power supply concepts on the actual performance of the detector.

Description

Subject(s)

Timepix4, power supply, low noise, noiseless threshold level, equalization

Citation