An innovative verification approach for nyquist-rate A/D converters – algorithm and implementation

dc.contributor.authorŽídek, Jan
dc.contributor.authorŠubrt, Ondřej
dc.contributor.authorMartínek, Pravoslav
dc.contributor.editorPihera, Josef
dc.contributor.editorSteiner, František
dc.date.accessioned2012-10-17T13:06:52Z
dc.date.available2012-10-17T13:06:52Z
dc.date.issued2009
dc.description.abstract-translatedEnvironment for testing static parameters of analog-to-digital converters is presented in this article. It is a novel concept of powerful engine suitable for design and verification of generic type ADCs in Mentor Graphics IC Studio software. The source code of each block of the design is written in Verilog-A which offers relatively effortless portability on different design systems (e.g. Cadence). The core of our proposal is based on Servo-Loop with improved search algoritm [1]. The simulation outputs are curves of static INL and DNL. Here, we focus mainly on algorithm and implementation of testing interface.en
dc.format5 s.cs
dc.format.mimetypeapplication/pdf
dc.identifier.citationElectroscope, 2009, Konference EDS 2009.cs
dc.identifier.issn1802-4564
dc.identifier.urihttp://hdl.handle.net/11025/551
dc.language.isoenen
dc.publisherZápadočeská univerzita v Plzni, Fakulta elektrotechnickács
dc.relation.ispartofseriesElectroscopecs
dc.rightsCopyright © 2007-2010 Electroscope. All Rights Reserved.en
dc.rights.accessopenAccessen
dc.subjectanalogově-digitální konvertorycs
dc.subjecttestovací prostředícs
dc.subject.translatedanalog-to-digital convertersen
dc.subject.translatedtesting environmenten
dc.titleAn innovative verification approach for nyquist-rate A/D converters – algorithm and implementationen
dc.typečlánekcs
dc.typearticleen
dc.typekonferenční příspěvekcs
dc.typeconferenceObjecten
dc.type.statusPeer-revieweden
dc.type.versionpublishedVersionen

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