Performance analysis of monolithically integrated depletion-/enhancement-mode InAlN/GaN heterostructure HEMT transistors

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dc.contributor.authorNagy, Lukáš
dc.contributor.authorChvála, Aleš
dc.contributor.authorStopjaková, Viera
dc.contributor.authorBlaho, Michal
dc.contributor.authorKuzmík, Ján
dc.contributor.authorGregušová, Dagmar
dc.contributor.authorŠatka, Alexander
dc.contributor.editorPinker, Jiří
dc.date.accessioned2019-10-16T06:41:56Z
dc.date.available2019-10-16T06:41:56Z
dc.date.issued2017
dc.description.abstract-translatedThe paper addresses a top-down design flow of depletion-load digital inverter formed by monolithically integrated depletion-mode and enhancement-mode high electron mobility transistors (HEMTs) on common InAlN/GaN heterostructure grown on sapphire substrate. We describe the inverter design at transistor level using HSPICE models developed earlier. The inverter layout representation, which also defines the lithographic masks required for the fabrication process, is presented as well. The proposed mask set was designed taking into account the design-for-manufacturing approach. Furthermore, we evaluated measured properties and performance of the fabricated transistors and circuits and recalibrate the transistor models according to the latest measurements.en
dc.format4 s.cs
dc.format.mimetypeapplication/pdf
dc.identifier.citation2017 International Conference on Applied Electronics: Pilsen, 5th – 6th September 2017, Czech Republic, p.129-132.en
dc.identifier.isbn978–80–261–0641–8 (Print)
dc.identifier.isbn978–80–261–0642–5 (Online)
dc.identifier.issn1803–7232 (Print)
dc.identifier.issn1805–9597 (Online)
dc.identifier.urihttp://hdl.handle.net/11025/35425
dc.language.isoenen
dc.publisherZápadočeská univerzita v Plznics
dc.rights© Západočeská univerzita v Plznics
dc.rights.accessopenAccessen
dc.subjectheterostruktura InAlN / GaNcs
dc.subjectmonolitická integracecs
dc.subjectHEMT tranzistorcs
dc.subjectdigitální měničcs
dc.subject.translateddigital inverteren
dc.subject.translatedInAlN/GaN Heterostructureen
dc.subject.translatedmonolithic integrationen
dc.subject.translatedHEMT transistoren
dc.titlePerformance analysis of monolithically integrated depletion-/enhancement-mode InAlN/GaN heterostructure HEMT transistorsen
dc.typekonferenční příspěvekcs
dc.typeconferenceObjecten
dc.type.statusPeer-revieweden
dc.type.versionpublishedVersionen

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