Current limiting driver for GaN half-bridge

dc.contributor.authorSkarolek, Pavel
dc.contributor.authorLettl, Jiří
dc.contributor.editorPinker, Jiří
dc.date.accessioned2019-10-16T09:08:56Z
dc.date.available2019-10-16T09:08:56Z
dc.date.issued2017
dc.description.abstract-translatedThis paper presents a GaN transistor half-bridge prototype with robust pulse by pulse current limiting drivers designed to turn off safely the transistor for the rest of the PWM period when the drain current exceeds the set value. The half-bridge is intended as the key part of a DC/AC converter output stage with operating frequency up to 1 MHz. The current limiting circuit is designed to meet the requirements for safe operation of GaN transistors. The proposed current limiting driver is five times faster compared to common integrated drivers with included current limiting circuit.en
dc.format4 s.cs
dc.format.mimetypeapplication/pdf
dc.identifier.citation2017 International Conference on Applied Electronics: Pilsen, 5th – 6th September 2017, Czech Republic, p.227-230.en
dc.identifier.isbn978–80–261–0641–8 (Print)
dc.identifier.isbn978–80–261–0642–5 (Online)
dc.identifier.issn1803–7232 (Print)
dc.identifier.issn1805–9597 (Online)
dc.identifier.urihttp://hdl.handle.net/11025/35442
dc.language.isoenen
dc.publisherZápadočeská univerzita v Plznics
dc.rights© Západočeská univerzita v Plznics
dc.rights.accessopenAccessen
dc.subjectGaN MOSFETcs
dc.subjectpoloviční mostcs
dc.subjectřidičcs
dc.subjectaktuální ochranacs
dc.subject.translatedGaN MOSFETen
dc.subject.translatedhalf-bridgeen
dc.subject.translateddriveren
dc.subject.translatedcurrent protectionen
dc.titleCurrent limiting driver for GaN half-bridgeen
dc.typekonferenční příspěvekcs
dc.typeconferenceObjecten
dc.type.statusPeer-revieweden
dc.type.versionpublishedVersionen

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